- Chong Zhao, Xiaoliang Bai, Sujit Dey, "Efficient transient error
effects in digital nanometer circuits," to appear in IEEE Transactions on Reliability.
- Chong Zhao, Yi Zhao, Sujit Dey, "An Intelligent Robustness
Insertion Methodology for Optimal Transient Error
Tolerance", to appear in IEEE transaction on Very Large Scale
- Chong Zhao, Sujit Dey, "Modeling Soft Error Effects Considering
Process Variations," to appear in
International Conference on Computer Design (ICCD), October 2007, Lake
- Chong Zhao, Sujit Dey, "Evaluating and Improving Transient Error
Tolerance of CMOS Digital VLSI Circuits," in
Proceedings of the International Test Conference 2006 (ITC), pp.29.1,
October 2006, Santa Clara, California.
- Chong Zhao, Sujit Dey, "Improving Transient Error Tolerance of Digital VLSI Circuits Using RObustness COmpiler
(ROCO)", in Proceedings of 7th International Symposium on Quality Electronic Design (ISQED), pp. 133-138, March 2006,
San Jose, California, USA. paper and talk.
Best Paper Award