Mobile Systems Design and Test Lab Principal Investigator:
Professor Sujit Dey

University of California, San Diego

Overview Projects People Publications News Contact Us Links


Adaptive Wireless
Applications
and Protocols
Low Power
System Design
Reliable Nanometer
System-on-Chips
Wireless Sensor
Networks

Reliable Nanometer Technology SoCs:

In this research area, we investigate techniques to improve the reliability of nanometer circuits and systems. Our recent work has been in understanding transient-error and designing robust systems that are tolerant of these errors. Below is a list of researchers, current projects, and selected publications.

People:

  Principal Investigator - Professor Sujit Dey
  Current Students - Chong Zhao

Related Projects:

  • Analysis and Design of Transient-Error-Tolerant Nanometer Circuits and Systems

Selected Publications:

  • Chong Zhao, Xiaoliang Bai, Sujit Dey, "Efficient transient error effects in digital nanometer circuits," to appear in IEEE Transactions on Reliability.

  • Chong Zhao, Yi Zhao, Sujit Dey, "An Intelligent Robustness Insertion Methodology for Optimal Transient Error Tolerance", to appear in IEEE transaction on Very Large Scale Integration Systems.

  • Chong Zhao, Sujit Dey, "Modeling Soft Error Effects Considering Process Variations," to appear in International Conference on Computer Design (ICCD), October 2007, Lake Tahoe, California.

  • Chong Zhao, Sujit Dey, "Evaluating and Improving Transient Error Tolerance of CMOS Digital VLSI Circuits," in Proceedings of the International Test Conference 2006 (ITC), pp.29.1, October 2006, Santa Clara, California.

  • Chong Zhao, Sujit Dey, "Improving Transient Error Tolerance of Digital VLSI Circuits Using RObustness COmpiler (ROCO)", in Proceedings of 7th International Symposium on Quality Electronic Design (ISQED), pp. 133-138, March 2006, San Jose, California, USA. paper and talk. Best Paper Award
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Please address comments and questions to naomir@ece.ucsd.edu