High-level Crosstalk Defect Simulation for System-on-Chip Interconnects
X.Bai, S.Dey, "High-level Crosstalk Defect Simulation for System-on-Chip Interconnects", in Proc. VLSI Test Symposium, Los Angeles, April 2001. pp. 169-175
X.Bai, S.Dey, "High-level Crosstalk Defect Simulation for System-on-Chip Interconnects", in Proc. VLSI Test Symposium, Los Angeles, April 2001. pp. 169-175